Field of the Disclosure
The present disclosure relates to a gate driver and an image display device including the same, and more particularly, to a gate driver capable of improving reliability without using a complicated waveform for driving pixels by simplifying the structure of a shift register, and an image display device including the gate driver.
Discussion of the Related Art
Recently, with the development of information society, demands in the display field are increasing in various forms. In order to meet the demands, studies into various slim, light-weighted flat panel displays having low power consumption, for example, a liquid crystal display (LCD), a plasma display panel (PDP), and an electro luminescent display (ELD) have been conducted.
FIG. 1 is a view illustrating a display panel and a gate driver 20 in the related art image display device, and FIG. 2 shows the output waveforms of the gate driver 20.
Referring to FIG. 1, the display panel may include a display area, the gate driver 20, etc., and a plurality of gate lines GL1, GL2, GL3, GL4, . . . and a plurality of data lines DL1, DL2, DL3, . . . may be formed on the display panel such that the gate lines GL1, GL2, GL3, GL4, . . . cross the data lines DL1, DL2, DL3, . . . to define a plurality of pixel areas.
Also, a switching transistor Tr, a storage capacitor C, a pixel circuit block CB, etc. may be formed in each pixel area.
The gate driver 20, which is formed in a gate in panel (GIP) type in the edge portion of the display panel, generates gate signals using a plurality of gate control signals received through a timing controller (not shown) and a level shifter (not shown), and supplies the gate signals to the display area through the plurality of gate lines GL1, GL2, GL3, GL4, . . . .
Here, each gate signal may be a gate start pulse, a gate shift clock, etc.
As shown in FIG. 1, the gate driver 20 may include a plurality of driving units 22A, 22B, 22C, 22D, . . . .
The driving units 22A, 22B, 22C, 22D, . . . may generate the gate signals using the plurality of gate control signals generated by the level shifter from a plurality of control signals transferred from the timing controller, and the gate signals may be supplied to the display area through the gate lines GL1, GL2, GL3, GL4, . . . .
Each gate signal for driving the display panel may be composed of at least one pulse.
That is, each gate signal may be a simple waveform of signal composed of a pulse, or a complicated waveform of signal composed of two or more pulses.
As shown in FIG. 2, a plurality of gate signals Scan1, Scan2, Scan3, Scan4, ScanN are complicated waveforms of signals including a first pulse A and a second pulse B.
The first pulse A and the second pulse B have a first period T1 and a second period T2, respectively, and have different pulse widths.
The first pulse A turns on the switching transistor Tr of the corresponding pixel area, and while the first pulse A is applied, a first data signal may be applied to the pixel area.
At this time, the first period T1 which is the period of the first pulse A, may be 1 frame.
Meanwhile, the second pulse B also turns on the switching transistor Tr of the corresponding pixel area, and while the second pulse B is applied, a second data signal may be applied to the pixel area.
At this time, the second period T2 which is the period of the second pulse B, may be 1 frame×N (N is the number of gate lines).
For example, the second pulse B may be transferred through only one gate line for each frame, and preferably, may be sequentially applied every frame.
In order to stably drive the image display device with the complicated waveforms of gate signals, it is necessary to accurately apply the gate signals.
However, when the complicated waveforms of gate signals are transferred, signal distortion may occur.
Also, in order to generate such complicated waveforms of outputs, a complicated structure of a driving unit (a shift register) is required.
In the case of designing a driving unit using c-Si transistors or poly-Si transistors, a complicated circuit makes no problem since the transistors have high mobility and high reliability, however, in the case of designing a driving unit using a-Si transistors or oxide transistors, no intended waveform of output may be obtained due to low mobility, etc. of the transistors